htond(netptr, hostptr, count);
These routines are used for conversion between the local host 64-bit ("double precision") representation, and 64-bit IEEE double precision representation, in "network order", i.e., big-endian, the MSB in byte , on the left.
As a quick review, the IEEE double precision format is as follows: sign bit, 11 bits of exponent (bias 1023), and 52 bits of mantissa, with a hidden leading one (0.1 binary). When the exponent is 0, IEEE defines a "denormalized number", which is not supported here. When the exponent is 2047 (all bits set), and: all mantissa bits are zero, value is infinity*sign, mantissa is non-zero, and: msb of mantissa=0: signaling NAN msb of mantissa=1: quiet NAN
Note that neither the input or output buffers need be word aligned, for greatest flexibility in converting data, even though this may impose a speed penalty on some architectures.
These subroutines operate on a sequential block of numbers, to save on subroutine linkage execution costs, and to allow some hope for vectorization.
On brain-damaged machines like the SGI 3-D, where type "double" allocates only 4 bytes of space, these routines *still* return 8 bytes in the IEEE buffer.
htons(3N), ntohs(3N), htonl(3N), ntohl(3N)
The VAX handles bytes backwards from most everyone else in the world. This is not expected to be fixed in the near future.
This software is Copyright (c) 1988-2013 by the United States Government as represented by U.S. Army Research Laboratory.
Reports of bugs or problems should be submitted via electronic mail to <firstname.lastname@example.org>.