Manual Reference Pages - AE (4)
- Attansic/Atheros L2 FastEthernet controller driver
To compile this driver into the kernel, place the following lines in your
kernel configuration file:
.Cd device miibus
.Cd device ae
Alternatively, to load the driver as a
module at boot time, place the following line in
device driver provides support for Attansic/Atheros L2 PCIe FastEthernet
The controller supports hardware Ethernet checksum processing, hardware
VLAN tag stripping/insertion and an interrupt moderation mechanism.
Attansic L2 also features a 64-bit multicast hash filter.
driver supports the following media types:
Enable autoselection of the media type and options.
The user can manually override the autoselected mode by
adding media options to
Select 10Mbps operation.
Set 100Mbps (FastEthernet) operation.
driver provides support for the following media options:
Force full duplex operation.
Force half duplex operation.
For more information on configuring this device, see
driver supports Attansic/Atheros L2 PCIe FastEthernet controllers, and
is known to support the following hardware:
- ASUS EeePC 701
- ASUS EeePC 900
Other hardware may or may not work with this driver.
Tunables can be set at the
prompt before booting the kernel or stored in
This tunable disables MSI support on the Ethernet hardware.
The default value is 0.
driver collects a number of useful MAC counter during the work.
The statistics is available via the
tree, where %d corresponds to the controller number.
| ae%d: watchdog timeout.
The device has stopped responding to the network, or there is a problem with
the network connection (cable).
| ae%d: reset timeout.
The card reset operation has been timed out.
| ae%d: Generating random ethernet address.
No valid Ethernet address was found in the controller NVRAM and registers.
Random locally administered address with ASUS OUI identifier will be used
driver and this manual page was written by
.An Stanislav Sedov
It first appeared in
.Fx 7.1 .
The Attansic L2 FastEthernet controller supports DMA but does not use a
descriptor based transfer mechanism via scatter-gather DMA.
Thus the data should be copied to/from the controller memory on each
Furthermore, a lot of data alignment restrictions apply.
This may introduce a high CPU load on systems with heavy network activity.
Luckily enough this should not be a problem on modern hardware as L2 does
not support speeds faster than 100Mbps.
Visit the GSP FreeBSD Man Page Interface.
Output converted with manServer 1.07.