Manual Reference Pages - ALTERA_JTAG_UART (4)
- driver for the Altera JTAG UART Core
.Cd device altera_jtag_uart
.Cd hint.altera_jtag_uart.0.at= nexus0
.Cd hint.altera_jtag_uart.1.at= nexus0
device driver provides support for the Altera JTAG UART core, which allows
multiple UART-like streams to be carried over JTAG.
allows JTAG UART streams to be attached to both the low-level console
interface, used for direct kernel input and output, and the
layer, to be used with
Sequential Altera JTAG UART devices will appear as
Altera JTAG UART devices can be connected to using Alteras
program, with the instance selected using the
argument on the management host.
supports JTAG UART cores with or without interrupt lines connected; if the
portion of the
entry is omitted, the driver will poll rather than configure interrupts.
Altera Embedded Peripherals IP User Guide
device driver first appeared in
.Fx 10.0 .
device driver and this manual page were
developed by SRI International and the University of Cambridge Computer
Laboratory under DARPA/AFRL contract
as part of the DARPA CRASH research programme.
This device driver was written by
.An Robert N. M. Watson .
must dynamically poll to detect when JTAG is present, in order to disable flow
control in the event that there is no receiving endpoint.
Otherwise, the boot may hang waiting for the JTAG client to be attached, and
user processes attached to JTAG UART devices might block indefinitely.
However, there is no way to flush the output buffer once JTAG is detected to
have disappeared; this means that a small amount of stale output data will
remain in the output buffer, being displayed by
when it is connected.
Loss of JTAG will not generate a hang-up event, as that is rarely the desired
does not place the client-side TTY in raw mode, and so by default will not
pass all control characters through to the UART.
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Output converted with manServer 1.07.