padlock - driver for the cryptographic functions and RNG in VIA C3, C7 and Eden processors

CONTENTS

Synopsis
Description
History
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Authors

To compile this driver into the kernel, place the following lines in your kernel configuration file:

.Cd device crypto


.Cd device padlock

Alternatively, to load the driver as a module at boot time, place the following line in loader.conf(5):

padlock_load="YES"

The C3 and Eden processor series from VIA include hardware acceleration for AES. The C7 series includes hardware acceleration for AES, SHA1, SHA256 and RSA. All of the above processor series include a hardware random number generator.

The padlock driver registers itself to accelerate AES operations and if available HMAC/SHA1 and HMAC/SHA256 for crypto(4). It also registers itself to accelerate other HMAC algorithms, although there is no hardware acceleration for those algorithms. This is only needed, so padlock can work with fast_ipsec(4).

The hardware random number generator supplies data for the kernel random(4) subsystem.

The padlock driver first appeared in
.Ox . The first
.Fx release to include it was
.Fx 6.0 .

crypt(3), crypto(4), fast_ipsec(4), intro(4), random(4), crypto(9)

.An -nosplit The padlock driver with AES encrytion support was written by
.An Jason Wright Aq jason@OpenBSD.org . It was ported to
.Fx and then extended to support SHA1 and SHA256 by
.An Pawel Jakub Dawidek Aq pjd@FreeBSD.org . This manual page was written by
.An Christian Brueffer Aq brueffer@FreeBSD.org .

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