QucsDigiLib - A wrapper script for digital modules and libraries.
] infile dir entity
is an integrated circuit simulator which means you are able to setup
a circuit with a graphical user interface (GUI) and simulate the large-signal,
small-signal and noise behaviour of the circuit. After that simulation has
finished you can view the simulation results on a presentation page or window.
The software aims to support all kinds of circuit simulation types, e.g. DC, AC,
S-parameter, harmonic balance analysis, noise analysis, etc.
is a wrapper script for digital modules and libraries created
by Qucs. The program utilizes the FreeHDL
compiler in order to convert
the VHDL output of Qucs into a C++ file. Thereafter this C++ source is
compiled to a binary. The binary is then copied into the VHDL directory.
- the filename of the VHDL file to be simulated located in the directory
specified in DIR
- the name of the directory where the compilation is going to be
- the entity name implemented in the VHDL file
- library name into which the module will reside
The latest version of Qucs can always be obtained from
Known bugs are documented within the BUGS file. Report bugs to
Copyright © 2005 Michael Margraf
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
Written by Michael Margraf <firstname.lastname@example.org> and
Stefan Jahn <email@example.com>.